The downscaling of devices in integrated circuit technology has permitted an improvement in the density of electronic integrated circuits. While it is desirable to continue searching for ways to further downscale devices to make them even smaller, the downscaling technology of electronic intergrated circuits is rapidly approaching its limits. On the other hand, the downscaling technology of systems integration (methods of packing integrated circuit chips for installation on a wiring board) has not been as thoroughly investigated.
One approach to optimize the size and weight of an electronic system has been monolithic wafer scale integration (WSI). In monolithic WSI, a silicon wafer is constructed as a usable system module. The wafer is then placed in an electronic device as an entity rather than sawing the individual chips from the wafer. A problem with this method is that one defective chip on the wafer can destroy the entire system module.
A previously attempted resolution to eliminate the problem of a defective chip within the wafer is termed the hybrid WSI technique. In hybrid WSI, fully functional pretested chips are reassembled and interconnected onto a silicon wafer substrate. The substrate provides the necessary interconnects to form a system module. However, the hybrid WSI technique cannot provide sufficiently downscaled devices and requires relatively long interconnect distances which can limit the speed of the system. A need thus exists for a method of mounting semiconductor chips into a small system module that is lightweight, compact and reliable.